electronic design automation Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing Electronics, electronic systems such as integrated circuits and printed circuit boards. The tools wo ...

, parasitic extraction is the calculation of the parasitic effects in both the designed devices and the required wiring

interconnect In telecommunications, interconnection is the physical linking of a carrier's network with equipment or facilities not belonging to that network. The term may refer to a connection between a carrier's facilities and the equipment belonging to ...

s of an

electronic circuit An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or traces through which electric current can flow. It is a type of electrical ...

parasitic capacitance Parasitic capacitance is an unavoidable and usually unwanted capacitance that exists between the parts of an electronic component or circuit simply because of their proximity to each other. When two electrical conductors at different voltages a ...

parasitic resistance In electrical networks, a parasitic element is a circuit element ( resistance, inductance or capacitance) that is possessed by an electrical component but which it is not desirable for it to have for its intended purpose. For instance, a resis ...

s and

parasitic inductance In electrical networks, a parasitic element is a circuit element ( resistance, inductance or capacitance) that is possessed by an electrical component but which it is not desirable for it to have for its intended purpose. For instance, a resisto ...

s, commonly called parasitic devices, parasitic components, or simply parasitics. The major purpose of parasitic extraction is to create an accurate analog model of the circuit, so that detailed simulations can emulate actual digital and analog circuit responses. Digital circuit responses are often used to populate databases for signal delay and loading calculation such as:

timing analysis Static timing analysis (STA) is a simulation method of computing the expected timing of a synchronous digital circuit without requiring a simulation of the full circuit. High-performance integrated circuits have traditionally been character ...

;

power analysis Power analysis is a form of side channel attack in which the attacker studies the power consumption of a cryptographic hardware device. These attacks rely on basic physical properties of the device: semiconductor devices are governed by the l ...

;

circuit simulation Electronic circuit simulation uses mathematical models to replicate the behavior of an actual electronic device or circuit. Simulation software allows for modeling of circuit operation and is an invaluable analysis tool. Due to its highly accurat ...

; and

signal integrity Signal integrity or SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage (or current) waveform. However, digital signals are fundamentally analog in nature, ...

analysis. Analog circuits are often run in detailed test benches to indicate if the extra extracted parasitics will still allow the designed circuit to function.

Background

In early

integrated circuit An integrated circuit or monolithic integrated circuit (also referred to as an IC, a chip, or a microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material, usually silicon. Large numbers of tiny ...

s the impact of the wiring was negligible, and wires were not considered as electrical elements of the circuit. However below the 0.5-

micrometre The micrometre ( international spelling as used by the International Bureau of Weights and Measures; SI symbol: μm) or micrometer (American spelling), also commonly known as a micron, is a unit of length in the International System of Unit ...

technology node Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuit (IC) chips such as modern computer processors, microcontrollers, and memory chips such as NAND flash and DRAM that are pres ...

resistance and capacitance of the interconnects started making a significant impact on circuit performance. With shrinking

process A process is a series or set of activities that interact to produce a result; it may occur once-only or be recurrent or periodic. Things called a process include: Business and management *Business process, activities that produce a specific se ...

technologies inductance effects of interconnects became important as well. Major effects of interconnect parasitics include: signal delay,

signal noise In electronics, noise is an unwanted disturbance in an electrical signal. Noise generated by electronic devices varies greatly as it is produced by several different effects. In particular, noise is inherent in physics, and central to the ...

, IR drop (resistive component of voltage).

Interconnect capacitance extraction

Interconnect capacitance is calculated by giving the extraction tool the following information: the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins (from a

Layout Versus Schematic The Layout Versus Schematic (LVS) is the class of electronic design automation (EDA) verification software that determines whether a particular integrated circuit layout corresponds to the original schematic or circuit diagram of the design. Back ...

run), and a cross sectional understanding of these layers. This information is used to create a set of layout wires that have added capacitors where the input polygons and cross sectional structure indicate. The output netlist contains the same set of input nets as the input design netlist and adds parasitic capacitor devices between these nets.

Interconnect resistance extraction

Interconnect resistance is calculated by giving the extraction tool the following information: the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins (from a

run), and a cross sectional understanding of these layers including the resistivity of the layers. This information is used to create a set of layout sub.wires that have added resistance between various sub-parts of the wires. The above Interconnect Capacitance is divided and shared amongst the sub-nodes in a proportional way. Note that unlike Interconnect Capacitance, Interconnect Resistance needs to add sub-nodes between the circuit elements to place these parasitic resistors. This can greatly increase the size of the extracted output netlist and can cause additional simulation problems.

Interconnect inductance extraction

Tools and vendors

The tools fall into the following broad categories. *

Field solver Electromagnetic field solvers (or sometimes just field solvers) are specialized programs that solve (a subset of) Maxwell's equations directly. They form a part of the field of electronic design automation, or EDA, and are commonly used in the de ...

s provide physically accurate solutions. They calculate electromagnetic parameters by directly solving

Maxwell's equations Maxwell's equations, or Maxwell–Heaviside equations, are a set of coupled partial differential equations that, together with the Lorentz force law, form the foundation of classical electromagnetism, classical optics, and electric circuits. ...

. Due to high calculation burden they are applicable only very small designs or to parts of the designs. *Approximate solutions with pattern matching techniques are the only feasible approach to extract parasitics for complete modern integrated circuit designs.

ANSYS Q3D Extractor

ANSYS Q3D Extractor uses method of moments (integral equations) and FEMs to compute capacitive, conductance, inductance and resistance matrices. It uses the

fast multipole method __NOTOC__ The fast multipole method (FMM) is a numerical technique that was developed to speed up the calculation of long-ranged forces in the ''n''-body problem. It does this by expanding the system Green's function using a multipole expansion, ...

(FMM) to accelerate the solution of the integral equations. Outputs from the solver include current and voltage distributions, CG and RL matrices.

FastCap, FastHenry

FastCap and FastHenry, from

MIT The Massachusetts Institute of Technology (MIT) is a private land-grant research university in Cambridge, Massachusetts. Established in 1861, MIT has played a key role in the development of modern technology and science, and is one of the mo ...

(Massachusetts Institute of Technology) are two free parasitics extractor tools for capacitance, and inductance and resistance. Quoted in many scientific articles, they are considered golden references in their field. Source code, as well as Windows binary versions with viewer and editor are freely available fro
FastFieldSolvers

FasterCap

FasterCap, fro
FastFieldSolvers
is a free, open source capacitance field solver, available for Windows and Linux OS, able to simulate conductive structures embedded in piece-wise-constant, complex permittivity dielectric media, automatic mesh refinement capability and in-core/out-of-core solver engine.

StarRC

StarRC from

Synopsys Synopsys is an American electronic design automation (EDA) company that focuses on silicon design and verification, silicon intellectual property and software security and quality. Products include tools for logic synthesis and physical design ...

(previously from Avanti) is a universal parasitics extractor tool applicable for a full range of electronic designs.

Quantus

Quantus from

Cadence In Western musical theory, a cadence (Latin ''cadentia'', "a falling") is the end of a phrase in which the melody or harmony creates a sense of full or partial resolution, especially in music of the 16th century onwards.Don Michael Randel (1999) ...

is a parasitic extractor tool for both digital and analog designs and parasitics extraction check have to be carried out to prepare the design for postlayout verification.

QuickCap

QuickCap NX from

is a parasitic extractor tool for both digital and analog designs. It was based on QuickCap developed by Ralph Iverson of Random Logic Corporation, which was acquired by Magma and Synopsys.

Calibre xACT3D

Calibre xACT3D from

Mentor Graphics Siemens EDA is a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981 as Mentor Graphics, the company was acquired by Siemens in ...

is a parasitic extractor tool for both digital and analog designs. It was based on PexRC developed by Wangqi Qiu and Weiping Shi of Pextra Corporation, which was acquired by Mentor.

CapExt

CapExt from CapExt AS is a parasitic extractor tool for extracting capacitance from PCBs based on Gerber files.

Fieldscale SENSE

Fieldscale SENSE from Fieldscale is a parasitic extractor tool for extracting capacitance, resistance and the whole RC equivalent circuit in a netlist format from capacitive touch sensors based on dxf and gerber files.Fieldscale
/ref>

References

{{DEFAULTSORT:Parasitic Extraction Electronic circuit verification